GTLP10B320 |
RFQ for GTLP10B320 Required Field |
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| Technical/Catalog Information | GTLP10B320MTD |
| Vendor | Fairchild Semiconductor |
| Category | Integrated Circuits (ICs) |
| Number of Circuits | 10-Bit |
| Package / Case | 56-TSSOP |
| Logic Type | Universal Bus Driver |
| Packaging | Tube |
| Mounting Type | Surface Mount |
| Number of Inputs | - |
| Current - Output High, Low | 24mA, 24mA |
| Supply Voltage | 3.15 V ~ 3.45 V |
| Operating Temperature | -40°C ~ 85°C |
| Voltage - Supply | 3.15 V ~ 3.45 V |
| Drawing Number | * |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | GTLP10B320MTD GTLP10B320MTD |
| Product | Manufacturers | Pack | D/C |
| GTLP10B320 | - | 04+ | TSSOP-7.2-56P |
The GTLP10B320 is a 10-bit Universal bus driver andreceiver, with separate LVTTL inputs and outputs and a feedback path for diagnostics, that provides LVTTL t GTLP signal level translation. High speed backplane oper ation is a direct result of GTLP!s reduced output swi (<1V), reduced input threshold levels and output edge rat control. The edge rate control minimizes bus settling time GTLP is a Fairchild Semiconductor derivative of th Gunning Transistor logic (GTL) JEDEC standard JESD8-3 Fairchild!s GTLP has internal edge-rate control and is pr cess, voltage and temperature (PVT) compensated. It function is similar to BTL and GTL but with different outpu
levels and receiver threshold. GTLP output low level is typ ically less than 0.5V, the output level high is 1.5V and th receiver threshold is 1.0V.
Features |
| ·Bidirectional interface between GTLP and LVTTL logiclevels·Variable edge rate control pin to select desired edge rateon GTLP port (V)ERC·VREFpin provides external supplreceiver threshold adjustibility·Split LVTTL inputs and outputs·Special PVT compensation circuitry to provide consis-tent performance over variations of process, supply volt-age and temperature·A feedback path for control and diagnostics monitoring·TTL compatible driver and control inputs·Designed using Fairchild advanced BiCMOS technology·Bushold data inputs on A port to eliminate the need forexternal pull-up resistors for unused inputs |
